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S i 5 x x - E VB
EVALUATION BOARD
Description
This document describes the operation of the Silicon Laboratories SI5XX-EVB evaluation board to evaluate both Silicon Laboratories' Si55x VCXOs and Si53x XOs. The Si55x and Si53x devices use Silicon Laboratories' advanced DSPLL(R) circuitry to provide a low-jitter clock at high frequencies. The Si55x/Si53x IC-based device is factory configurable for a wide variety of user specifications including frequency, supply voltage, output, and tuning slope. Specific configurations are factory programmed into the Si55x/Si53x at time of shipment, thereby eliminating the long lead times associated with custom oscillators. Si55x/Si53x samples should be ordered at the same time as the SI5XX-EVB since the EVB does not come with the device. This allows end users maximum flexibility. Silicon Laboratories can solder down samples when ordering an EVB; please specify when ordering.
FOR
Si53X XOS
Features
AND
S i5 5 X V C X O S
Evaluation of Silicon Laboratories' Si55x/53x family AC-coupled differential output clocks Voltage control (VC) input port (for Si55x devices) Jumper selection for multi-frequency outputs Jumper selection for output enable
Functional Block Diagram
Configuration Jumpers
Power Input
VC Input
RC Filter (no-pop)
Si5xx Device
CLK+ Output Bias DC Block CLK-
Rev. 0.14 2/06
Copyright (c) 2006 by Silicon Laboratories
SI5XX-EVB
SI5XX-EVB
1. Functional Description
The SI5XX-EVB provides access to all signals for configuring and operating the device. This board allows evaluation of the Si55x VCXO device either by itself (open-loop) or within a prototype PLL (closed-loop). The performance of the Si53x XO device can also be evaluated on this board (the Vc port is not used for XO devices).
1.2. Voltage Control for VCXOs
The voltage control (VC) input of the Si55x device is conveniently accessible through an SMA jack (J3) but can also be driven (and observed) through 100 milcentered posts (JP4). For prototyping purposes, two 0603 solder pads are located near the device VC input (R3 and C3). A traditional PLL might use these as a single-time-constant low-pass filter (RC filter). The EVB is shipped with a 0 resistor soldered at R3; C3 is left open. The voltage control input is not used for XO devices.
Table 1. Jumper Control
Part Type Si530 Si532 Si534 Si550 Si552 Si554 JP1 N/A N/A N/A N/A JP2 N/A N/A N/A N/A JP3 OE OE OE OE Freq Sel OE JP4 N/A Freq Sel N/A VC VC VC
1.3. Output Clock
Because the Si55x/Si53x devices can support an LVPECL buffer type (in addition to LVDS and CMOS), pulldown resistors (R1 and R2) are available for proper output biasing. For LVPECL buffers, biasing can be achieved through a variety of equivalent circuits; the SI5XX-EVB allows for 130 pulldown resistors. After the output biasing, the high-speed outputs are dcblocked for connection to differently biased inputs, such as standard test equipment or a phase detector EVB. Please review "1.4. Preparing the EVB" for non-LVPECL devices.
Freq Sel1 Freq Sel2
Freq Sel1 Freq Sel2
Notes: 1. With jumper(s) installed, signal(s) are driven low. 2. With jumper(s) not installed, signal(s) are pulled high.
1.1. Power Supply
The Si55x/Si53x devices support operation from nominal voltages of 1.8, 2.5, and 3.3 V. Review the device data sheet and part number for allowed configurations of output buffer type and device power supply.
1.4. Preparing the EVB
By default, the evaluation board is set up to accept LVPECL configured devices. This configuration uses 130 pull-down resistors to bias the LVPECL output stage. If an LVDS, CMOS, or CML based device is to be installed, the output biasing resistors, R1 and R2, should be removed.
2
Rev. 0.14
VDD
C4 DNS
C5 DNS
C6 DNS
J4
VDD
2. Schematics
POS1 POS2
MKDSN 2,5/3-5,08 VDD
1 2
EVB Power Input
Main output; route as differential pair
U1
VDD
OE C1 R3
2 OE
6
SMA J1
J3 SMA
1 VC CLKOUTR1 F1 DNS DNS R2 0.1uF C2 0 C3 DNS
CLKOUT+ 4
0.1uF
5
SMA J2
7 F1
DNC
High-order pole
9
Si550
F2
F2
3
Rev. 0.14
JP4
Silicon Labs VCXO
Alternate Vc input Place in-line with J3
JP3 JP1 OE F1
GND
Vc input
8
JP2
F2
Output Enable
Frequency Select
SI5XX-EVB
Figure 1. SI5XX-EVB Schematic
3
SI5XX-EVB
3. Bill of Materials
Item 1 2 3 4 5 6 7 8 9 Quantity 2 2 1 1 4 3 1 1 2 Reference C1,C2 C5 C4 C6 JP1,JP2,JP3,JP4 J1,J2,J3 J4 R3 R1,R2 Description CAP,SM,0.1UF,16V,20%,X7R,0402 CAP,SM,0.1UF,16V,20%,X7R,0603 CAP,SM,10UF,10V,10%,TANTALUM,3216 CAP,SM,100PF,50V,10%,C0G,0603 CONN,HEADER,2X1 CONN,SMA SIDE MOUNT CONN,POWER,2 POSITION RES,SM,0 OHM,0603 RES,SM,150,1%,0603 Manufacturer's # Manufacturer C0402X7R160-104KNE VENKEL C0603X7R160-104KNE VENKEL TA010TCM106KAR VENKEL C0603C0G500-101KNE VENKEL TSW-150-07-T-D or TSW-150-07-T-S SAMTEC 901-10003 AMPHENOL 1729018 PHOENIX CONTACT CR0603-16W-000T VENKEL CR0603-16W-1500FT VENKEL
No Load 11 10
1 C3 1 U1
CAP,SM,0.1UF,16V,20%,X7R,0603 Si5XX
C0603X7R160-104KNE Si5XX
VENKEL SILICON LABORATORIES
4
Rev. 0.14
SI5XX-EVB
4. Layout
Figure 2. Assembly Drawing
Figure 3. Layer 1 Primary
Figure 4. Layer 2 Secondary
Rev. 0.14
5
SI5XX-EVB
DOCUMENT CHANGE LIST
Revision 0.13 to Revision 0.14
Updated "Bill of Materials" on page 4. Updated Figure 2, "Assembly Drawing," on page 5.
6
Rev. 0.14
SI5XX-EVB
NOTES:
Rev. 0.14
7
SI5XX-EVB
CONTACT INFORMATION
Silicon Laboratories Inc. 4635 Boston Lane Austin, TX 78735 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: VCXOinfo@silabs.com Internet: www.silabs.com
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories, Silicon Labs, and DSPLL are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.
8
Rev. 0.14

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